Abstract: As the use of epitaxial silicon in High-Voltage MOS, IGBT and FRD increases, the crack occurring in epitaxial silicon deposition becomes noticeable trouble. The possibility of the crack is in direct proportion to epitaxial layer thickness. Based on the observation of crack and the analysis of related factor,the results show that thermal stress was essential to the crack. The effect of growth rate, growth temperature and epitaxial temperature field on thermal stress were studied. In a certain range, decreasing growth rate and increasing growth temperature can depress the crack. By the ion implanted wafer, the temperature gradient in the edge of pocket was measured. To depress the slide of wafer in high temperature can be capable of putting wafer in the correct position where the temperature gradient of the pocket is flat. By this way, the ratio of the crack will be significant lower up to zero.